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ATtiny84 PWM - Revision history
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Admin at 02:53, 1 February 2016
2016-02-01T02:53:40Z
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<p><b>New page</b></p><div><br />
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// Example #1 PWM on pin PB2 (OC0A which is on 8-bit timer0)<br />
// For 8MHz clock: 61.2kHz period (16.25ms) of which half is on and half is off<br />
DDRB = 1<<DDB2; // make OC0A (DDB2) PWM output pin <br />
TCCR0A = (1<<COM0A1) | (1<<COM0B0) | (1<<WGM00); // Clear OC0A/OC0B on Compare Match (bit 7 + 6)<br />
// PWM, Phase Correct<br />
TCCR0B = (1<<CS02); // clkI/O/256(from prescaler)<br />
// not used // TIMSK1=0B00000010; //enable output compare interrupt for OCR1A<br />
OCR0A = 127; // set 50% duty cycle (0.5*256)<br />
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// Example #2 PWM on pin PA6 (OC1A which is on 16-bit Timer1)<br />
// For 8MHz clock: 61.2kHz period (16.25ms) of which half is on and half is off<br />
DDRA = 1<<DDA6; // make OC1A (DDA6) PWM output pin <br />
TCCR1A = (1<<COM1A1) | (1<<COM1B0) | (1<<WGM00); // Clear OC1A/OC1B on Compare Match (bit 7 + 6)<br />
// PWM, Phase Correct<br />
TCCR1B = (1<<CS02); // 256 prescaler<br />
OCR1A = 127; // set 50% duty cycle (0.5*256)<br />
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See also:<br />
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* [[ATtiny84_ADC]]<br />
* [[ATtiny85_PWM]]</div>
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